Instruction Cache Locking Using Temporal Reuse Profile
نویسندگان
چکیده
منابع مشابه
Dynamic Instruction Cache Locking in Hard Real-Time Systems
Cache memories have been widely used in order to bridge the gap between high speed processors and relatively slower main memories, and thus to improve the overall performance of systems. However in the context of hard real-time systems, they are a source of predictability problems. A lot of progress has been achieved to model caches to statically determine safe and precise bounds on the worst-c...
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ژورنال
عنوان ژورنال: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
سال: 2015
ISSN: 0278-0070,1937-4151
DOI: 10.1109/tcad.2015.2418320